EUV lithography monopoly; AI capex foundation.
Live quote sourced from Yahoo Finance. Prices cited in narrative below reflect the original memo date and may be stale.
ASML manufactures extreme ultraviolet (EUV) lithography systems, the critical tool for sub-7nm chip production. Nearly all advanced AI chips (training and inference) use ASML EUV-enabled nodes. As GPU and accelerator demand explodes, ASML's installed base and pricing power expand. Thesis: picks-and-shovels vendor to AI-driven chip production, with near-monopoly in advanced lithography.
ASML is the single strongest enabler in the index—a monopoly supplier of EUV lithography systems to every advanced-node foundry (TSMC, Samsung, Intel). The Sequoia thesis is completely agnostic to the outcome, but it is absolutely dependent on semiconductor manufacturing capacity. ASML manufactures the indispensable tool for that capacity.
Nearly all advanced AI chips (NVDA H200, AMD MI300X, ASML EUV-produced custom silicon, etc.) are produced on ASML EUV-enabled nodes. TSMC, Samsung, and Intel have no alternative to ASML for advancing to 3nm, 2nm, and beyond. As the Sequoia thesis drives 5–10x growth in AI-compute demand, foundries scale capacity, which requires ASML tool orders. EUV adoption is non-negotiable; margin expansion is structural.
| Node | ASML Tool Type | Capex Driver | TAM Trend |
|---|---|---|---|
| 7nm and below (EUV required) | EUV scanners (€150–170M each) | AI training/inference chips | 20%+ CAGR through 2028 |
| High-NA EUV (5nm and smaller) | Next-gen EUV scanners | Advanced node transitions | Emerging; ramp 2025–2026 |
| 3D NAND stacks | Step-and-repeat EUV | Memory for AI data centers | 10%+ CAGR |
| Chiplet packaging (CoWoS) | Immersion EUV for advanced packaging | GPU/memory integration | High growth, 30%+ CAGR |
| Legacy nodes (28nm and above) | DUV (non-EUV), declining share | No AI exposure | Flat to declining |
TSMC, Samsung, and Intel must use ASML EUV systems to produce advanced chips. Inverse lithography (next-gen patterning) is years away from credibility. ASML has structural pricing power.
ASML is the only supplier of High-NA systems (0.55 NA and beyond). As foundries transition from standard EUV to High-NA, ASML captures another refresh cycle of tool orders. This extends the monopoly through 2030.
More AI workloads → more hyperscaler capex → more foundry orders → more ASML tools. The thesis is indifferent to business model (copilot vs. autopilot), but absolutely dependent on chip production. ASML benefits from both.
Gross margins are 52%+. Recurring service revenue (system maintenance, upgrades) provides cushion. ASML is a cash-generative machine regardless of cyclicality.
TSMC capex could range from $20B (trough) to $45B+ (peak). ASML revenue swings accordingly. If hyperscaler capex suddenly contracts, ASML revenues compress 30%+ in a single year.
China is off-limits for advanced EUV; EU and US have restrictions. This caps TAM at ~60–70% of what it would be in a fully integrated world. A secondary concern but material.
TSMC will remain ~50% of ASML revenues. If TSMC capex declines or shifts away from advanced nodes, ASML is directly impacted. Diversification is limited; there are only 3–5 credible foundries globally.
High-NA EUV development has taken longer than expected (delayed by 2–3 years). Any further delays would compress near-term growth rates.
ASML is the strongest pure-enabler in the index. It manufactures the indispensable tool for every advanced node that produces AI chips, from NVDA H200 to custom-silicon accelerators. The Sequoia thesis is structurally bullish for AI-compute demand, which translates directly to foundry capex and ASML tool orders. However, ASMLs verdict is conditional on capex cycle timing, not strategic thesis. If foundry capex is in an up-cycle, ASML is a 20%+ growth name with 50%+ gross margins. If a capex trough arrives, ASML compresses to single-digit growth. The current backlog ($50B+) suggests up-cycle through 2026–2027, but 2028 is uncertain.
Strongest enabler position: indispensable tool for all advanced AI chip production; sustained capex tailwind.